I am placed at Intel as Grade 5 design engineer. T...

I am placed at Intel as Grade 5 design engineer. The journey with maven silicon is phenomenal. I started of by taking a online DM course. The course contains digital and verilog content. It also contains labs and mini project. So we will be able to master the rtl design and do the mini project by our own. Later I got to join the VM course where we will be learning about the verification methodologies. Excellent lab sessions and protocol based projects which help to gain the industry experience.
Excellent faculty members and I enjoy this amazing journey